1. Field of the Invention
This invention relates generally to an apparatus and a method for manufacturing multi-layer packages for electronic devices. More specifically, the invention relates to a device and an assembly method for fabricating pin grid array assembly packages, using a removable plate.
2. Description of Related Art
A widely-utilized technique for manufacturing packages for electronic devices involves the use of a pin grid array. The array includes a plurality of conductive pins which are used to form the leads for the electronic device package. Electroplating is employed to provide leads with enhanced solderability, conductivity, and/or immunity to corrosion. In the prior art, a conductive plate is welded to the pin grid array to electrically short out leads during the electroplating process. These leads are held at substantially the same electrical potential to ensure a relatively uniform coating of metal over each lead. The pin grid array is configured to provide at least one ground lead such that an electrical potential may be applied between the conductive plate and a ground terminal.
A drawback of prior-art grid array manufacturing techniques is that the pins of the array must be welded to an etched plate prior to electroplating. However, after electroplating is completed, the plate must then be removed by shearing off the ends of the pins near the plate. This step is costly and time-consuming. Furthermore, the plates cannot be re-used to fabricate additional integrated circuits, and are usually discarded.
An example of a prior-art method for electroplating integrated circuit package leads is described in U.S. Pat. No. 4,706,382. A tie bar is utilized, comprised of a metal strip which is resistance-welded near the ends of the leads. This configuration provides electrical continuity to the leads during plating. The tie bar itself also serves as a stabilizer for accurate alignment of the leads inside the pin grid array package. Therefore, the leads may be accurately aligned, welded to the tie bar, and then brazed into the pin grid array package. Subsequently, the tie bar must be removed by cutting or shearing the leads to a uniform length just above the tie bar. However, welding the tie bar and then shearing the tie bar from the leads adds additional steps to the manufacturing process which are both time-consuming and costly. Furthermore, each etched plate is discarded after removal from the pin grid array.
Accordingly, it is an object of the invention to provide an improved assembly for packaging electronic devices such as integrated circuits. A pin grid array package is employed, but the steps of welding or brazing an etched plate to the pin grid array and shearing the pins to remove the etched plate, are not required.
The etched plate can also be used as a ground to eliminate problems caused by static electricity during the integrated circuit assembly process. Unlike the conductive plates of the prior-art, the etched plate of the invention can be removed easily when desired.